1. Field of the Invention
The present invention relates to a driving technology of a liquid crystal display (LCD), and more particularly, to a method of driving a gate line in a large sized and high resolution LCD which enables to extend a line time by making different a falling time of scan signals while concurrently driving plural gate lines.
2. Background of the Related Art
Generally, LCDs which are used for displaying characters, symbols, or graphics utilize the optical property of liquid crystal in which molecular arrangement of the liquid crystal is varied when an electric field is applied to the liquid crystal. The LCD is one kind of flat panel displays in which the liquid crystal technologies are combined with the semiconductor technologies.
Thin film transistor (TFT) LCDs have thin film transistors as the switching element for turning on and off pixels. As the TFTs are turned on or off, the pixels are turned on or off.
As shown in FIG. 1, a general TFT LCD includes a plurality of cells arranged in a matrix configuration. A unit cell includes a TFT 132 serving as the switching element, a liquid crystal cell 134 and a storage capacitor CSTG. Sources of the TFTs are connected to data lines (D1–DN) arranged in a column direction and one sided ends of the data lines are connected to a source driver 120. Gates of the TFTs are connected to gate lines (G1–GM) arranged in a row direction and one sided ends of the gate lines are connected to a gate driver 110, thereby realizing a display having an N×M resolution. For instance, SVGA level has a resolution of 800×600, XGA level has a resolution of 1024×768 and UXGA level has a resolution of 1,600×1200.
Here, the source driver 120 is also referred to as a data driver or column driver and the gate driver is referred to as a scan driver or row driver.
Referring to FIG. 1, the liquid crystal cell 134 is connected between drain of the TFT 132 and pixel electrode and is disposed between the pixel electrode and a common electrode of an upper panel. The pixel electrode is made of transparent indium tin oxide (ITO) having the conductivity. When a turn on signal is applied to gate of the TFT 132, the pixel electrode transfers a signal voltage applied through the source driver 120 to the liquid crystal cell 134. The common electrode is also made of ITO and applies a common voltage Vcom to the liquid crystal cell. The storage capacitor CSTG maintains a voltage applied to the pixel electrode during a constant time and controls light transmittance by varying an orientation state of liquid crystal molecules in the liquid crystal cell. One end of the storage CSTG can be connected to an independent electrode or gate electrode, which is called “storage on gate” mode.
In a driving of this pixel array, when a driving voltage is applied to the liquid crystal only in one direction, degradation of the liquid crystal is accelerated. To this end, there is used an inversion which periodically applies an image data voltage applied to the liquid crystal in an opposite polarity. The period of such an inversion is normally one filed.
There are four inversion driving methods, i.e., a field inversion driving method which changes the voltage polarity of all pixels every field at once, a line inversion driving method which changes the voltage polarity every a line connected to a single scan line, a column inversion driving method which changes the voltage polarity of a column every field and a dot inversion which changes the polarity by unit of a pixel. In any cases, the voltage, which is applied to the pixel electrode through the drain electrode of the TFT is alternatively changed such that it has a positive (+) or negative (−) direction with respect to the common voltage Vcom.
FIG. 2 is a schematic view showing a general gate driver. Referring to FIG. 2, a gate driver 110 includes a shift register 111, a level shifter 112 and an output buffer 113. The shift register 111 receives a vertical synchronous signal and a vertical clock signal, to thereby generate scan pulses sequentially. The level shifter 112 shifts a voltage level of the scan pulses to approximately 30 V. The output buffer 113 provides respective gate lines of G1–GM with the level-shifted scan pulses.
Here, The most general driving method that is used to drive gates is the progressive scanning method as shown in FIG. 3. Since the progressive scanning method scans only a single gate line (or scan line) during one line time (1H), respective gate driving signals are sequentially applied to gate lines every 1H.
On the other hand, as LCDs are developed with a trend of a large screen size, resistance of data lines and load of capacitance increase and thus a time which the data driving circuit transmits a video signal to the pixel is more and more shortened. This causes an insufficient charge of the pixel and affects on a lowering in the picture quality. Therefore, this problem should be necessarily resolved.
FIG. 4 shows driving signals used in the conventional interlace scanning method in order to increase the line time. Referring to FIG. 4, the conventional interlace scanning method has a line time longer than the progressive scanning method two times.
However, this interlace scanning method has a drawback in that the vertical resolution decreases by half since the same video signal is transmitted into pixels connected to two gate lines. Accordingly, these conventional gate driving methods are not alternative methods upon considering a high picture resolution -oriented current trend.